Electrical Engineering 219C
Title | Computer-Aided Verification |
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Units | 3 |
Prerequisites | 219B and Computer Science 172 or consent of instructor. |
Description | Introduction to the theory and practice of formal methods for the design and analysis of concurrent and embedded systems. Focus on algorithmic techniques for checking logical and timing properties of circuits and communication protocols. Topics include the semantics of reactive systems, temporal logic model checking, the theory of omega automata, state space reduction techniques, compositional and hierarchical reasoning, real time. |
Sections | Instructor | Teaching Effectiveness | How worthwhile was this course? |
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Spring 2016 | Sanjit Seshia | ||
Spring 2015 | Sanjit Seshia | ||
Fall 2012 | Sanjit Seshia | ||
Spring 2011 | Sanjit Seshia | ||
Fall 2009 | Sanjit Seshia | ||
Spring 2007 | Sanjit Seshia | ||
Spring 2006 | Sanjit Seshia | ||
Fall 1999 | Thomas A. Henzinger | ||
Spring 1998 | Thomas A. Henzinger | ||
Overall Rating | Teaching Effectiveness | How worthwhile was this course? | |