Computer Science 152 — Computer Architecture and Engineering (5 Units)
CS152 provides foundational knowledge for students seeking to learn about computer architecture. A handful of topics taught in this class may also help prepare students for operating systems courses, such as CS162. CS152 fulfills the design course requirement for EECS and L&S CS majors. This course is taught above the digital circuit abstraction, and focuses on the design of processors at a higher level. It begins with discussing important architectures in history, then moves on to ISA design, pipelining, memory hierarchy, and virtual memory. Several types of processors are then discussed, including out-of-order, superscalar, and vector processors.
- CISC vs RISC ISAs
- Memory hierarchy, virtual Memory
- Out-of-Order, superscalar, and vector processors
- Cache coherency, memory consistency models
This course is divided into five modules, each with
- 1 problem set
- 1 lab
- 2 midterms
- 1 final
This course has 3 hours of lecture and 1 hour of discussion per week. As stated above, the course is modular, so problem sets and labs come out every 3-ish weeks. There is no scheduled lab time; they are to be completed on students’ time, like projects. They can take several hours each, depending on the topic being covered. Students in 152 are also invited, but not required, to do a more free-form research project along with the students in 252A, the graduate listing of the same lectures.
Choosing the Course
When to take
After CS61C, if you liked learning about designing CPUs. Taking this after EECS151 may help, but EECS151 is generally considered a much heavier workload.
- EECS151: Introduction to Digital Design and Integrated Circuits (one abstraction layer lower)
- CS162: Operating Systems and Systems Programming
- CS252: Graduate Computer Architecture
Usefulness for Research or Internships
CS152 is a good course to take (along with EECS151) to get into computer architecture research. Learn RTL if you would like to do research in this area! The ASPIRE Lab is a top lab for architecture research, and many of the architectures studied in 152 (along with RISC-V and Chisel) were/are being developed at ASPIRE.
The modularity of this course means that if you do badly in one module, you won’t necessarily do badly in the following ones. This class is relatively forgiving in this manner. Try not to procrastinate on problem sets and labs, as they may take more time than expected. Problem sets are good preparation for the exams, so do them carefully.
Last Updated: Summer 2020