Computer Science 150 — Components and Design Techniques for Digital Systems (5 Units)

Course Overview

Summary

This class teaches the principles and methodology of digital logic design at the gate and switch level, including both combinatorial and sequential logic elements. In the course, students gain experience developing a relatively large and complex digital system using modern computer-aided design tools. Through this experience, students learn to appreciate the process by which a high-level specification of a circuit is synthesized into logic networks.

Prerequisites

  • CS61C
  • EE40 or EE42

Note: Although EE40/EE42 is listed as a prerequisite, it is not absolutely necessary. Regarding transistors, EE40 focuses at the analog level, while CS150 mostly focuses at the abstraction of logic circuits.

Topics Covered

  • Synchronous Digital Systems
  • Clocking
  • Combinatorial Logic
  • Sequential Logic
  • Finite State Machines
  • Implementation Platforms
  • FPGA (Field Programmable Gate Array)
  • Architecture and Implementation
  • Lookup Tables (LUTs)
  • FPGA CAD Tools
  • Verilog
  • CAD Tools
  • Logic Synthesis
  • Partitioning, Placement, Routing
  • Simulation
  • I/O, Handshaking
  • Memory
  • Pipelining
  • CMOS Implementation Technologies
  • Combinatorial Logic
  • Boolean Algebra
  • Formal Methods, Karnough Maps
  • Two Level Logic
  • Energy and Power
  • Timing
  • Design Blocks
  • Adders, including Carry-Save Addition
  • Shifters
  • Multipliers
  • System Organization
  • Resource Scheduling
  • Modulo Scheduling
  • Parallel vs. Serial Resources

Workload

Course Work

  • Weekly problem sets
  • Weekly labs (in the beginning of the course)
  • One massive, multi-part project in which you design a CPU in Verliog
  • One midterm
  • One final

Time Commitment

The lectures, labs, discussions, and problem sets take around 10 to 15 hours per week. However, for the final project during the last half of the semester, expect to devote between 10 to 40 (or more) hours per week on the project.

HKN Tips

  • Spend reasonable time and effort on your designs before writing any Verilog code for labs and project checkpoints.
  • Put effort into building simulation test-benches for your project as it is more effective for debugging and less time consuming than pushing to hardware every time you change something.
  • Treat every project checkpoint as a hard deadline.

Also, do not take this class with another design class.

Choosing the Course

Category

  • Computer Science
  • Computer Architecture
  • Digital Systems

When to take

Take this class after CS61C and, if you can, after EE40. Also, this class is considered one of the hardest design classes offered, so it is not advised to take this as your first design class.

What next?

CS152 is an abstraction layer above this course.

EE141 is an abstraction layer below this course.

Usefulness for Research or Internships

Research: This class opens the door to research in digital design. Along with CS152, this class opens the door to research in computer architecture.

Internships: If you are applying for a digital design job, most companies want to see this class on your resume. Most will not even consider you if you haven't completed this course.

Additional Comments

Coolest aspects:

  • You can build your own CPU from scratch for any ISA specification and interface it with cache, DRAM, and graphics engines.
  • Being able to solve a problem that software isn't able to complete fast enough.